Explain comparators, gate symbols, logic families, tri-state outputs, pull resistors and how FPGAs are designed.
Syllabus: Digital ICs: families of digital ICs; gates; programmable logic devices
Compendium articles on the ideas in this lesson, beyond what the exam asks.
Practise the 11 pool questions for this group. Answers are shuffled, and every one comes with a one-line "why".
A comparator compares its input to a threshold. When the input crosses it, the output changes state. With noise near the threshold, a single threshold makes the output flip back and forth. Hysteresis gives two thresholds (one for rising, one for falling) so noise cannot cause unstable output.
RememberCross the threshold: output changes. Hysteresis: noise-proof switching.
An AND gate has a flat back and round front, an OR has a curved back with a pointed front. A small bubble on the output means inversion: AND + bubble = NAND, OR + bubble = NOR. A triangle with a bubble is NOT. Click the inputs and watch the output.
Memory hookNo bubble: AND/OR. Bubble: invert it, NAND/NOR. Triangle plus bubble: NOT.
CMOS draws almost no current except while switching, so it has the lowest power of the common families. Its input threshold is about half the supply voltage, so a clean signal sits far from it and noise on the input or supply rarely flips it. BiCMOS combines the high input impedance of CMOS with the low output impedance of bipolar transistors.
RememberCMOS: lowest power, threshold near half the supply. BiCMOS: CMOS in, bipolar out.
A tri-state output has three states: 0, 1, and high impedance, where it is effectively disconnected. A line nobody drives floats, so a pull-up or pull-down resistor to the supply or ground establishes a voltage when an input or output is an open circuit.
RememberTri-state: 0, 1, high-Z. Pull-up or pull-down: sets the level when nothing drives it.
A field-programmable gate array is a chip of logic blocks and wiring you reconfigure after manufacture. You design it by writing a hardware description language (HDL), which software compiles into the configuration.
RememberFPGA design = HDL.